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Embedded Firmware Solutions : Development Best Practices for the Internet of Things.

Bibliographic Details
Main Author: Zimmer, Vincent.
Other Authors: Sun, Jiming., Jones, Marc., Reinauer, Stefan.
Format: eBook
Language:English
Published: Berkeley, CA : Apress L. P., 2015.
Edition:1st ed.
Subjects:
Electronic books.
Online Access:Click to View
Table of Contents:
  • Intro
  • Contents at a Glance
  • Contents
  • About the Authors
  • About the Technical Reviewers
  • Acknowledgments
  • Foreword
  • Introduction
  • Chapter 1: Introduction
  • What Is Embedded Firmware?
  • Where Is Firmware?
  • What Do Firmware Engineers Do?
  • Firmware Preparation for New Hardware
  • The Mystery of Bits
  • Programming Guides
  • The Intel® Firmware Support Package
  • The Uniqueness of Embedded Firmware
  • The Choice of Firmware Stacks
  • Welcome to the Era of the Internet of Things
  • Technical Coverage in This Book
  • The Future of Firmware
  • Chapter 2: Firmware Stacks for Embedded Systems
  • Is a One-Size-Fits-All Solution Possible?
  • Microkernel
  • Real-Time Operating S ystem (RTOS)
  • Legacy BIOS
  • Implementations of the UEFI Framework
  • Open Source Firmware Stacks
  • Proprietary Firmware Stacks
  • Make o r Buy
  • The Advantages of Outsourcing
  • The Disadvantages of Outsourcing
  • In-House Development
  • Summary
  • Chapter 3: Intel® Firmware Support Package (Intel® FSP)
  • The Intel FSP Philosophy
  • What Is in Intel FSP?
  • Intel FSP Binary Format
  • Sample Boot Flow
  • Locating the Entries of Intel FSP
  • The Hard Way to Find Intel FSP APIs: Use Data Structure
  • The Easy Way to Find FSP APIs: Use Hard-Coded Constants
  • Programming Interface: The APIs of Intel FSP
  • TempRamInit
  • FspInitEntry
  • NotifyPhase
  • Intel FSP Output
  • API Execution Status
  • Temporary Memory Data HOB
  • Non-Volatile Storage HOB
  • Sample Code for Parsing HOBs
  • Customization of Intel FSP
  • Downloading Intel FSP
  • Microcode Patches
  • Relocating Intel FSP
  • Integration and Build
  • The Future of Intel FSP
  • What Is Coming in the Following Chapters
  • Chapter 4: Building coreboot with Intel FSP
  • The Introduction of coreboot
  • The Philosophy of coreboot
  • A Brief History
  • v1: 1999-2000
  • v2: 2000-2005
  • v2+: 2005-2008.
  • v3: 2006-2008
  • 2008 LinuxBIOS Renamed "coreboot"
  • v4: 2009-2012
  • v4+: 2012-2014
  • Further Reading
  • Prerequisites for Working with coreboot
  • Community Organization
  • Git and Gerrit
  • Git Commit Messages
  • coreboot Sign-off Procedure
  • Developer's Certificate of Origin 1.1
  • Adding Your Sign-off
  • Working with the coreboot Community
  • coreboot Do's
  • coreboot Don'ts
  • Nonsource Binaries in coreboot
  • A Hands-on Example: Building coreboot for the MinnowBoard MAX Mainboard
  • Environment
  • Hardware: MinnowBoard MAX
  • MinnowBoard MAX Platform Details
  • Development Directory
  • Downloading Intel FSP
  • Installing Intel FSP
  • Downloading the coreboot Source
  • coreboot Toolchain
  • coreboot Commit Hooks
  • Creating a coreboot Development Branch
  • Building the Mainboard
  • On the Menuconfig Menu
  • On the Chipset Menu
  • On the Devices Menu
  • Build
  • Summary of Commands
  • Flashing the ROM
  • Preparing the Flash Programmer
  • Flashing the ROM Image
  • coreboot Internals
  • Boot Stages
  • Additional Files
  • CBFS
  • An Example of CBFS
  • CBFS Size
  • Special Binaries
  • Boot Flow Using Intel FSP
  • Reset Vector and Bootblock
  • romstage
  • ramstage
  • Payload
  • coreboot Source
  • coreboot Device Tree
  • Chips and Devices
  • Device Tree Variables
  • A Device Tree Example
  • Chip Operations
  • Device Operations
  • coreboot Hardwaremain State Machine
  • State Machine States
  • State Machine Callbacks
  • Mainboard
  • The Chipset Driver
  • Chipset FSP UPD Options
  • The FSP Driver
  • Kconfig
  • xcompile
  • Payloads
  • SeaBIOS
  • GRUB 2
  • FILO
  • iPXE
  • TianoCore
  • Depthcharge
  • U- Boot
  • Memtest86+
  • libpayload
  • coreboot Troubleshooting and Debugging
  • Postcodes
  • Serial Debug
  • EHCI USB Debug
  • Summary
  • Chapter 5: Chrome book Firmware Internals
  • About Chrome book and Chrome OS
  • Chrome OS Firmware Overview.
  • Chrome OS Security Philosophy
  • Chrome OS Security Guiding Principles
  • Power wash
  • Chrome OS Boot Modes
  • Verified (Normal) Mode
  • Recovery Mode
  • Developer Mode
  • Chrome OS Coreboot
  • x86
  • ARM
  • Depth charge Payload
  • libpayload
  • Verified Boot
  • Verified Boot and Kernel Security
  • Chrome OS Firmware Boot Log
  • Boot Times Log
  • Chrome OS Firmware Event Log
  • Google SMI Linux Kernel Driver
  • Chrome OS Extensions to the Firmware Image
  • FMAP
  • BOOT_STUB FMAP Section
  • Chrome OS Firmware RW FMAP Sections
  • An fmap.dts (RW_SECTION_A) Example
  • Google Binary Block (GBB)
  • GBB: HWID v3
  • GBB: Firmware Bitmaps
  • GBB: Firmware Keys
  • GBB: Boot Flags
  • Vital Product Data ( VPD)
  • Firmware TPM Usage
  • Chrome OS Firmware Update
  • Chrome OS Utilities
  • flashrom
  • gbb_utility
  • GBB Flags Utility Script: set_gbb_flags.sh
  • crossystem
  • mosys
  • Google Embedded Controller
  • Power Sequencing
  • Battery Charging
  • Thermal Management
  • Keyboard Controller
  • Other Peripheral Controls
  • Chrome EC Software Sync
  • Software Sync Steps
  • Summary
  • Chapter 6: Intel FSP and UEFI Integration
  • Introduction to EFI
  • Introduction to FSP
  • Introduction to EDK II
  • Summary
  • FSP Components
  • FSP Wrapper Boot Flow
  • Generic FSP Wrapper Boot Flow
  • Normal Boot
  • Boot Flow
  • Memory Layout for a Normal Boot Flow
  • FSP Normal Boot Data Structure
  • S3 Boot
  • Boot Flow
  • S3 Memory Layout
  • S3 NV Data Passing
  • Capsule Flash Update
  • Boot Flow
  • Capsule Update Memory Layout
  • Recovery Boot Flow
  • FSP Recovery Memory Layout
  • coreboot Payload Based upon EDK II
  • Building Minnow and MinnowMax with FSP
  • Future of the Intel FSP
  • Conclusion
  • Chapter 7: Building Firmware for Quark Processors
  • Overview of UEFI and PI
  • History of Implementations and Specifications
  • Introduction to EDK II Building Blocks.
  • PKG: Packaging
  • MdePkg
  • MdeModulePkg
  • IntelFrameworkPkg
  • IntelFrameworkModulePkg
  • Packages
  • PCD: Platform Configuration Database
  • Syntax
  • DEC: Platform Declaration File
  • Syntax
  • DSC: Platform Description File
  • FDF: Flash Description File
  • Syntax
  • Build: The EDK II Build Command
  • INF: INF File
  • More Information
  • Introduction to the EDK II Subset
  • Introduction to Quark
  • ROM Flash Image Size Optimization
  • Fixed Resource
  • DRAM/SMRAM
  • Remove Features
  • Reduce Features
  • Compiler Options
  • Build Options
  • Results of the TinyQuark Optimization
  • RAM Footprint Optimization
  • Optimization
  • Result of Memory Usage Optimization
  • Conclusion
  • Chapter 8: Putting It All Together
  • RTOS and Intel FSP
  • Intel FSP and Open Source Philosophy
  • Customization and Production of Intel FSP
  • It Is a Community Effort After All
  • Appendix A: Sample Boot Setting File (BSF)
  • Index.

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